1) Field of the Invention
This invention relates generally to fabrication of semiconductor devices and more particularly to the fabrication of a FET with a metal gate.
2) Description of the Prior Art
The advancement in transistor technology has led to numerous emerging issues. Gate oxide is one of the most aggressively scaled parameter to maintain the Moore's Law. ITRS 2001 has shown that by 2005, the current SiO2 material could have reached an unacceptable gate leakage with decreasing oxide thickness. Hence, new material is needed to replace silicon dioxide by then.
Currently, the semiconductor workers are hot on the heels in search of new materials, the more promising ones at this point in time is High K materials (HfO and ZrO, etc). High K materials would provide a lower EOT for a given thickness which would reduce the stringent requirement compared to silicon dioxide in terms of thickness requirement. The need for High K material is therefore low power driven and not high performance driven. In addition, lithography is also another challenging area whereby gate length is scaled aggressively too. One of the methods to extend the limitation of lithography in the sub-micron gate era is to perform resist trimming.
Another scaling issue would be the polysilicon gate/SiO2 system. If silicon dioxide continues to grow thinner, the poly depletion effect causes higher EOT and aggravates short channel effects. The gate capacitance and the saturation current would be reduced. These would make current silicon dioxide material seems almost impossible for future transistor technology. Therefore, alternatives are currently being sought after. One of the promising candidates would be the metal gate technology. Materials for metal gate are currently been looked into. Metal gates do not exhibit the poly depletion effects but are low power consumption, higher drive current capability and higher speed due to lower gate resistance.